andwati/mos-6502
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5 Commits
Author SHA1 Message Date
andwati 0dcd2ed687 Implement state saving and loading for CPU and Bus, add tests for various functionalities 
- Added `state.c` to handle saving and loading the state of the CPU and Bus.
- Implemented CRC32 checksum for data integrity verification during state operations.
- Enhanced `README.md` in tests/roms to document new test commands for decimal, interrupt, Apple I, and nestest.
- Created new test files: `run_apple1.c`, `run_decimal.c`, `run_interrupt.c`, `run_nestest.c`, and `run_vectors.c` to validate the new features.
- Updated `run_tests.c` to include tests for state saving/loading and other functionalities.
- Introduced `test_vectors.py` to facilitate downloading and running JSON test vectors for opcode verification.
 2026-07-20 13:55:48 +03:00
andwati c6e1c5b3b5 completed game 2026-07-20 12:29:15 +03:00
andwati 758fac98f6 created plan 2026-04-25 18:58:28 +03:00
andwati e1735296f3 update design document: improve section headings and expand memory bus details 2025-12-21 20:06:43 +03:00
andwati 45b96c4390 add CPU and memory modules with associated header files; update README and .gitignore 2025-12-21 18:45:56 +03:00